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From code-abyss
End-to-end hardware product pipeline from requirements to Gerber files, compiled ESP-IDF firmware, and cross-platform UniApp client. Useful for new IoT or embedded products.
How this skill is triggered — by the user, by Claude, or both
Slash command
/code-abyss:designing-hardware-products <product-brief: MCU, sensors, features, form-factor><product-brief: MCU, sensors, features, form-factor>This skill is limited to the following tools:
The summary Claude sees in its skill listing — used to decide when to auto-load this skill
> From empty directory to shippable product. Requirements in, Gerber + .bin + .apk out.
From empty directory to shippable product. Requirements in, Gerber + .bin + .apk out.
| Scenario | Use | Why |
|---|---|---|
| New IoT / embedded product from scratch | Yes | Full pipeline |
| Adding BLE app to existing hardware | Partial | Phase 4 only |
| PCB redesign with existing firmware | Partial | Phase 3 only |
| One-off breadboard prototype | No | Overkill, just wire it |
Phase 1: System Design → DESIGN.md (architecture, topology, protocol)
Phase 2: Firmware → ESP-IDF components, FreeRTOS tasks, BLE GATT
Phase 3: Hardware → KiCad schematic → PCB → route → DRC → Gerber
Phase 4: Mobile App → UniApp (BLE, i18n, dev mode, SVG icons)
Phase 5: Verify + Package → build all → zip release
Each phase is independently re-runnable. Skip phases that already exist.
/designing-hardware-products "BLE mosquito swatter with kill counting, ESP32-C3, 30x100mm PCB strip"
| Topic | File |
|---|---|
| Phase execution details | pipeline-phases.md |
| KiCad 9 gotchas | kicad9-quirks.md |
| ESP-IDF patterns | esp-idf-patterns.md |
| HV circuit design | hv-design.md |
| UniApp patterns | uniapp-patterns.md |
idf.py build passes (firmware)npx uni build passes (app)npx claudepluginhub telagod/code-abyss --plugin code-abyssGenerates complete firmware architecture specs for described embedded/IoT devices: layer diagrams, module responsibilities, HAL interfaces, state machines, RTOS decisions.
Automates KiCad to EasyEDA to JLCPCB PCB workflow: project setup, LCSC part sourcing, pin-map fetching, fully-wired .kicad_pcb generation via pcbnew, and EasyEDA handoff for routing and ordering.
Designs embedded hardware architectures: MCU/SoC selection, power trees, interfaces, sensors/actuators, RF/connectivity, BOM/PCB risks, schematics, validation, reviews.