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From analog-design-rf
Design RF/mmWave blocks (LNA, mixer, VCO, PLL, PA): topology and matching, S-parameter, harmonic-balance, Pnoise/PAC, IP3, and load-pull analyses. (Skeleton — full domain rules land in Phase 5.)
How this skill is triggered — by the user, by Claude, or both
Slash command
/analog-design-rf:rf-designThis skill is limited to the following tools:
The summary Claude sees in its skill listing — used to decide when to auto-load this skill
> **Status: skeleton (Phase 0).** The stage sequence, tool lists, and QoR metrics
Status: skeleton (Phase 0). The stage sequence, tool lists, and QoR metrics below are the planned scope from
PLAN.md§5.12. Detailed per-stage Domain Rules, Common Issues & Fixes, memory wiring, anddesign_state.jsonintegration are implemented in Phase 5.
Design RF/mmWave blocks (LNA, mixer, VCO, PLL, PA): topology and matching, S-parameter, harmonic-balance, Pnoise/PAC, IP3, and load-pull analyses.
rf_spec → topology_matching → sparameter_analysis → harmonic_balance → noise_linearity → loadpull_optimization → rf_signoff
To be detailed in Phase 5. Each stage above gets numbered, specific
rules, with thresholds sourced from design_state.constraints (see
docs/design_state_schema.md).
Creates, edits, and optimizes skills for Claude Code, including drafting, evaluating with test prompts, iterating on performance, and improving skill descriptions for better triggering accuracy.
npx claudepluginhub chuanseng-ng/analog-chip-design-agents --plugin analog-design-rf