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From analog-design-physical-verification
Run DRC, LVS, antenna/ERC, and density/DFM checks against the foundry decks and sign off physical correctness of the layout. (Skeleton — full domain rules land in Phase 3.)
How this skill is triggered — by the user, by Claude, or both
Slash command
/analog-design-physical-verification:physical-verificationThis skill is limited to the following tools:
The summary Claude sees in its skill listing — used to decide when to auto-load this skill
> **Status: skeleton (Phase 0).** The stage sequence, tool lists, and QoR metrics
Status: skeleton (Phase 0). The stage sequence, tool lists, and QoR metrics below are the planned scope from
PLAN.md§5.7. Detailed per-stage Domain Rules, Common Issues & Fixes, memory wiring, anddesign_state.jsonintegration are implemented in Phase 3.
Run DRC, LVS, antenna/ERC, and density/DFM checks against the foundry decks and sign off physical correctness of the layout.
drc → lvs → antenna_erc → density_dfm → pv_signoff
To be detailed in Phase 3. Each stage above gets numbered, specific
rules, with thresholds sourced from design_state.constraints (see
docs/design_state_schema.md).
Creates, edits, and optimizes skills for Claude Code, including drafting, evaluating with test prompts, iterating on performance, and improving skill descriptions for better triggering accuracy.
npx claudepluginhub chuanseng-ng/analog-chip-design-agents --plugin analog-design-physical-verification