By aklofas
Analyze KiCad schematics and PCB layouts, source components from major distributors, generate fabrication files, and run SPICE simulations and EMC compliance checks directly from the editor.
BOM (Bill of Materials) management for electronics projects — the primary orchestrator skill that coordinates DigiKey, Mouser, LCSC, element14, JLCPCB, PCBWay, and KiCad skills into a unified workflow. Create, update, and maintain BOMs with part numbers, costs, quantities stored as KiCad symbol properties. ALWAYS trigger this skill for any task involving component sourcing, pricing, ordering, distributor searches, BOM export, or fabrication preparation — even if the user names a specific distributor or fab house (e.g. "search DigiKey for...", "generate JLCPCB BOM", "order from Mouser"). This skill decides which distributor/fab skills to invoke and in what order. Also trigger on phrases like "what parts do I need", "order components", "how much will this cost", "export for JLCPCB", "find parts for this board", "cost estimate", "compare pricing", or "check stock".
Extract structured specifications from electronic component datasheet PDFs — pinouts, electrical characteristics, peripherals, topology, and features. Cache extractions per project for consumption by schematic and PCB analyzers. Primary consumer infrastructure for `kicad`, `emc`, `spice`, and `thermal` analyzers. Use this skill whenever the user asks to extract, verify, or read specs from a component datasheet; when analyzers need verified IC knowledge (EN pin thresholds, PG presence, USB peripheral speed); or when a review mentions datasheet coverage, extraction quality, or per-MPN specifications. Also triggers on "extract this datasheet", "what are the specs for MPN X", "verify datasheet extraction", or "check pin functions for part Y".
Search DigiKey for electronic components and download datasheets — primary source for prototype orders and the preferred API method for fetching datasheets. Find parts by keyword or MPN, check pricing/stock, download datasheets via API, analyze specifications. Sync and maintain a local datasheets directory — extract components from schematics, download missing datasheets, keep them up to date. Also supports batch MPN-list seeding (`--mpn-list`) for bulk workflows without a KiCad project. Use when the user asks about electronic components, part specs, datasheets, pricing, stock, footprints, or needs to download a datasheet — even without mentioning "DigiKey". Also for "sync datasheets", "download datasheets for my board/project", or mentions a datasheets directory. DigiKey is the default distributor for prototyping. For BOM workflows, see the bom skill.
Search Newark, Farnell, and element14 for electronic components — find parts by MPN or distributor part number, check pricing/stock, download datasheets, analyze specifications. One unified API covers all three storefronts (Newark for US, Farnell for UK/EU, element14 for APAC). Free API key, simple query-parameter auth, no OAuth. Datasheets download directly from farnell.com CDN with no bot protection. Sync and maintain a local datasheets directory for a KiCad project, or use batch MPN-list seeding (`--mpn-list`) for bulk workflows without a project. Use this skill when the user mentions Newark, Farnell, element14, needs parts from a non-US distributor, wants to compare pricing across regions, or needs datasheets from a source that doesn't require complex API auth. For package cross-reference tables and BOM workflow, see the `bom` skill.
EMC pre-compliance risk analysis for KiCad PCB designs — 18 check categories, 44 rule IDs covering ground planes, decoupling, I/O filtering, switching harmonics, clock routing, differential pair skew, board edge radiation, PDN impedance, return paths, crosstalk, ESD protection, shielding, and magnetic leakage from switching inductors. Produces severity-ranked risk report with pre-compliance test plan. Supports FCC Part 15, CISPR 32, CISPR 25 (automotive), MIL-STD-461G. SPICE-enhanced when available. Use when the user asks about EMC, EMI, radiated/conducted emissions, FCC compliance, CE marking, CISPR, ground plane issues, decoupling strategy, clock routing EMC, switching noise, differential pair skew, or whether their board will pass EMC testing. Also for "will this pass FCC?", "check my EMC", "is my ground plane okay?", "check my decoupling", or "generate an EMC test plan".
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AI-powered design review for KiCad. Analyzes schematics, PCB layouts, and Gerbers. Catches real bugs before you order boards.
Works with Claude Code, OpenAI Codex, GitHub Copilot CLI, and Gemini CLI, as a GitHub Action for automated PR reviews, or as standalone Python scripts you can run anywhere.
These skills turn your AI coding agent into a full-fledged electronics design assistant that understands your KiCad projects at a deep level: parses schematics and PCB layouts into structured data, cross-references component values against datasheets, detects common design errors, and walks you through the full prototype-to-production workflow.
Point your agent at a KiCad project and it does the rest — parses every schematic and PCB file, traces every net, computes every voltage, and tells you what's wrong before you spend money on boards.
"Analyze my KiCad project at
hardware/rev2/"
Here's a condensed example from an open-source robot controller board. The agent found all of this automatically:
It builds your power tree — tracing every regulator from input to load, computing output voltages from feedback dividers:
VBUS (USB-C / battery input, fused)
├── AP63357 buck (500kHz switching) → 5V
│ └── Feedback: R8/R9 ratio=0.155 → Vout=3.87V
│ Power dissipation: ~0.15W (85% efficiency assumed)
└── RT9080-3.3 LDO → 3.3V
└── Decoupling: 16 caps, 10.8µF total
It identifies every subcircuit — not just passives, but the functional blocks and how they connect:
| Subcircuit | Details |
|---|---|
| Motor drive | 9x P-MOSFET switches (DMG2305UX), transistor-driven H-bridges |
| Filters | RC signal conditioning at 16Hz, 169Hz, and 1.03kHz (input filtering and debounce) |
| Lighting | WS2812B addressable LED chain on GPIO, 60mA estimated draw |
| Sensors | Onboard sensor interface, crystal oscillator with load cap validation |
| Protection | ESD clamp on USB D+/D-, dual input fuses (0.75A signal, 2.5A motor) |
It audits every connector for ESD protection — and flags the ones that are exposed:
ESD coverage: 19 connectors audited
USB-C: ESD clamp on D+/D- ✓ (partial — 13 signal pins per ground ⚠️)
Fuse F1: 2.5A motor input ✓
Fuse F2: 0.75A signal input ✓
⚠️ 6-pin header: no protection (exposed signals)
⚠️ Motor outputs: no protection (exposed to back-EMF)
⚠️ Servo connectors: no protection (exposed signals)
⚠️ Sensor port: no protection
... 19 of 19 connectors have coverage gaps
It validates your passive networks — computing actual circuit behavior from component values:
| Detection | Components | Computed Value | What It Means |
|---|---|---|---|
| RC filter | R21/C31 | fc = 15.9 Hz | Low-pass for slow analog signal |
| RC filter | R1/C13 | fc = 169 Hz | Debounce / noise rejection |
| RC filter | R2/C14 | fc = 1.03 kHz | Signal conditioning |
| Feedback | R8/R9 | ratio = 0.155 | Buck converter output voltage set |
| Divider | R42/R43 | ratio = 0.500 | Voltage sensing (half) |
| Crystal | Y1 | CL = 14.0 pF | Load cap status: ok (target: 18 pF, -22%) |
It suggests applicable certifications — based on what it detects in the design:
Suggested certifications:
FCC Part 15 Subpart B (US) — unintentional radiator compliance
CISPR 32 / CE EMC Directive (EU) — EMC compliance for EU market
It checks production readiness — BOM lock status, connector ground distribution, decoupling adequacy:
BOM lock: 0% — no MPNs assigned (prototype stage)
Decoupling: 5 rails, 34 caps total (132µF motor, 110µF logic, 10.8µF 3.3V)
Connector ground: USB-C has 13:1 signal-to-ground ratio (recommended ≤3:1)
npx claudepluginhub aklofas/kicad-happy --plugin kicad-happyGenerate JLCPCB-ready KiCad PCB projects from descriptions, BOMs, or existing projects. Sources LCSC parts (basic-tier preferred), generates schematics, and packages routed boards into Gerber/drill/CPL/BOM zips ready to upload to JLCPCB.
Agentic KiCad PCB design workflow using SKiDL — architect, source, code, and verify circuits with AI agents.
Hardware solution design skills and workflows for embedded and hardware engineers.
AI-powered hardware development platform — design, verify, synthesize, and deploy working RTL with natural language. 18 agents, 25 skills, 8 IP blocks.
RTL-to-GDS skill: drives an open-source EDA flow (Yosys + OpenROAD-flow-scripts + KLayout + Magic + Netgen + OpenRCX) from a natural-language spec or RTL to GDSII with DRC, LVS, and RCX signoff.
97-agent RTL design pipeline with 97 skills for 6-Phase hardware design automation (Research → Architecture → μArch → RTL → Verify → Design Note)